Modelsim/Questa

Mapping av alterabibliotek:

vmap cyclonev /prog/altera/vhdl_libs/cyclonev
vmap lpm /prog/altera/vhdl_libs/lpm
vmap altera /prog/altera/vhdl_libs/altera
vmap altera_mf /prog/altera/vhdl_libs/altera_mf

Simulering av VHDL

VHDL Testbenk

Synthese av VHDL

Referanselitteratur

[Wikipedia:VHDL]

[Ashenden Designs]

[VHDL Tutorial: Learn by Example]

[VHDL Quick Start (slides by Ashenden)]

[Modelsim]

[10 tips for generating reusable VHDL]

[Actel HDL coding Style Guide]

[VHDL primer] [Bitvis utility library]