SmartFusion2- AMBA APB, Custom Peripheral

Intro

This tutorial explains how to create a custom AMBA APB (Advanced Peripheral Bus) module. The tutorial will create a SmartFusion2 MSS (Microcontroller Subsystem) with APB bus interface. The custom module will be connected to the APB bus to map from APB bus to a DCS bus. Connected to the DCS part there will be a test module, which you can write and read from. The MSS will also have a GPIO module connected to a LED and serial a UART peripheral.

Before you start

Make sure you have installed Libero and have a valid license, as described in SmartFusion2. This tutorial assumes Libero v11.1 is used and that you are using the SmartFusion2 starter kit from Actel.

Create new project

Start Libero SoC v11.1. Press Project and New Project. You can name your project APB_custom_peripheral. Use system tools SmartFusion2 Microcontroller Subsystem (MSS).

Modify MSS

Double click on the MSS component to modify it. A new window will open. Enable/Disable peripherals until your MSS looks like the image below.
Tip: click View > Maximize Work Area or CTRL+W to expand the working area while enabling and disabling the MSS peripherals.

Click on the configuration button for the enabled peripherals, and configure them like the following images

MSS CCC

Reset Controller

FIC 0

MMUART 0

Your MSS should now look like this:

SmartDesign

Close the MSS configuration window. On the SmartDesign canvas, right click on the MSS component and Update instance(s) with Latest Component.
From Catalog add the following components: CoreAPB3 from Bus Interfaces,

Chip Oscillators and Clock Conditioning Circuitry from Clock & Management

Now, Import the vhdl files Media:APB_DCS_files.zip by clicking File, Import, HDL Source Files. These files can now be found under hdl in the Files tab and in Design Hierarchy. In Design Hierarchy right click on DCS_test, choose Create Core from HDL. Answer No to question about adding bus interfaces to core. Right click on apb_to_dcs and choose Create Core from HDL. Choose Yes on question about adding bus interfaces to core. Choose Add/Edit bus interfaces.... In next window, click Add Bus Interface..., choose APB, AMBA, AMBA2, slave. Connect PSELx to psel.

Add the modules you made to the SmartDesign. In design canvas, right click and choose Auto Connect followed by Auto Arrange Instances. Right click on MSS_RESET_N_F2M and GPIO_FABRIC and select Promote to Top Level. Right click on reset_from_siu and choose Tie Low. Connect the unconnected wires. The result should look something like the image below

Generate component by clicking SmartDesign and Generate Component.

Pre-synthesized Simulation

Use run.do supplied and user.bfm