User contributions for Nfyku
13 February 2024
- 12:1412:14, 13 February 2024 diff hist +79 m Bitvis UVVM VHDL Verification Component Framework →Simulation current
24 January 2024
- 07:5807:58, 24 January 2024 diff hist +126 m Synthese av VHDL →Precision current
- 07:5407:54, 24 January 2024 diff hist +104 m Simulering av VHDL →Starte Questa Sim current
5 February 2021
- 13:4413:44, 5 February 2021 diff hist +13 m Synthese av VHDL oppdatert sdf-inkludering med sdfnoerror
- 12:1012:10, 5 February 2021 diff hist +278 m Synthese av VHDL →Koden til alu_tb.vhdl
- 08:0508:05, 5 February 2021 diff hist 0 m Synthese av VHDL →Precision
4 February 2021
- 21:1321:13, 4 February 2021 diff hist −16 m Modelsim/Questa →Referanselitteratur current
- 21:0921:09, 4 February 2021 diff hist +2 m VHDL Testbenk →Do-file og testbenk current
- 21:0821:08, 4 February 2021 diff hist −14 m VHDL Testbenk No edit summary
- 21:0621:06, 4 February 2021 diff hist +13 m Simulering av VHDL →Starte Questa Sim
- 21:0521:05, 4 February 2021 diff hist +1 m Synthese av VHDL No edit summary
- 21:0221:02, 4 February 2021 diff hist −383 Modelsim/Questa No edit summary
- 13:4813:48, 4 February 2021 diff hist +4 m Synthese av VHDL No edit summary
- 13:4613:46, 4 February 2021 diff hist +2 m Synthese av VHDL →Precision
- 13:3913:39, 4 February 2021 diff hist −20 m Synthese av VHDL No edit summary
- 13:3713:37, 4 February 2021 diff hist −165 m Synthese av VHDL No edit summary
- 12:5212:52, 4 February 2021 diff hist +496 Synthese av VHDL Updated to Vivado
15 October 2020
- 11:3011:30, 15 October 2020 diff hist +3 m IHP 130nm process No edit summary
- 09:2009:20, 15 October 2020 diff hist +220 m IHP 130nm process No edit summary
- 09:1909:19, 15 October 2020 diff hist −2 m Layout XL and IHP SG13S No edit summary