Spice deck: Difference between revisions
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LTspice file:[[Media:spice.asc]] | LTspice file:[[Media:spice.asc.txt]] | ||
<pre> | <pre> | ||
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* Voltage | * Voltage | ||
* from to volts | * from to volts | ||
VDD VDD | VDD VDD GND 3 | ||
* Transistor | * Transistor | ||
* Drain Gate Source Bulk | * Drain Gate Source Bulk | ||
MN1 Out In | MN1 Out In GND GND nmos W=10u L=1u | ||
* Load Resistor and Capacitor | * Load Resistor and Capacitor | ||
* from to ohms | * from to ohms | ||
RD VDD Out 5k | RD VDD Out 5k | ||
Cl Out | Cl Out GND 0.1p | ||
* Voltage source | * Voltage source | ||
* from to volts | * from to volts | ||
VI In | VI In GND DC 1.281 AC 1 | ||
* | * | ||
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.options nomod nopage | .options nomod nopage | ||
.width OUT=80 | .width OUT=80 | ||
.connect | *.connect GND 0 | ||
* | * | ||
* Simulation and Plots | * Simulation and Plots | ||
Revision as of 22:24, 8 September 2013
LTspice file:Media:spice.asc.txt
Common Source gain stage, max gain * Analysis and design of analog integrated circuits * Problem 3.4 * NB ! Model level 1 only - Similar to hand calcualtions * * Voltage * from to volts VDD VDD GND 3 * Transistor * Drain Gate Source Bulk MN1 Out In GND GND nmos W=10u L=1u * Load Resistor and Capacitor * from to ohms RD VDD Out 5k Cl Out GND 0.1p * Voltage source * from to volts VI In GND DC 1.281 AC 1 * * Models * .model nmos nmos (level=1 VT0=0.6 KP=200u LAMBDA=0.2 + TOX=10e-9 PHI=0.93 GAMMA=0.6 + CJ=9.8E-5 PB=0.72 MJ=0.36 + CJSW=2.2E-10 MJSW=0.1) * * Setup * .options nomod nopage .width OUT=80 *.connect GND 0 * * Simulation and Plots * *.TF V(Out) VI *.OP .ac dec 10 1k 100.0e9 * Amplitude Bode Plot .plot ac vdb(Out) * Phase Bode Plot .plot ac vp(Out) .END