# Symbolsk løsning av nodeligninger med Matlab

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### Using Kirchoff's current law (KCL) on a source follower configuration to find Vout as a function of Vin

```% Using Kirchoff's current law (KCL) on a source follower configuration
% to find Vo as a function of Vin
% Kjetil Ullaland, 2020

syms s Cdg Cgs Cds Vin Vo Vgs Zc gm Rl Rs R Av Avo

%%
disp('Only Cgd with series resistor is considered (Zc)')

eq1=(Vo-Vgs)/(R+Zc)+gm*Vgs+Vo/Rl == 0;
eq2=(Vgs-Vo)/(R+Zc)+(Vgs-Vin)/Rs == 0;
eq1=subs(eq1,Zc,1/(s*Cdg));
eq2=subs(eq2,Zc,1/(s*Cdg));
disp('KCL for circuit node 1:');
pretty(eq1);
disp('KCL for circuit node 2:');
pretty(eq2);

disp('Solve for Vo and Vin and calculate Av (Vo/Vin):');
solved=solve(eq1,eq2,Vo,Vin);
Av=solved.Vo/solved.Vin;
pretty(simplify(Av));

pretty(subs(Av,Rl*gm,Avo));
%%
disp('All MOST capasitors are considered')

syms s Cdg Cgs Cds Vin Vo Vgs gm Rl Rs Av Avo

eq1=(Vo-Vgs)*s*Cdg + gm*Vgs + Vo/Rl + Vo*s*Cds == 0;
eq2=(Vgs-Vin)/Rs + Vgs*s*Cgs + (Vgs-Vo)*s*Cdg == 0;
disp('KCL for circuit node 1:');
pretty(eq1);
disp('KCL for circuit node 2:');
pretty(eq2);

disp('Solve for Vo and Vin and calculate Av (Vo/Vin):');
solved=solve(eq1,eq2,Vo,Vin);
Av=solved.Vo/solved.Vin;
pretty(simplify(Av));

pretty(subs(Av,Rl*gm,Avo));
```

### Using Kirchoff's current law (KCL) on single transistor stage, fig. 9.18 to find Vo as a function of Is

```% Using Kirchoff's current law (KCL) on single transistor stage, fig. 9.18
% to find Vo as a function of Is
% Kjetil Ullaland, 2020

syms Vo V1 s gm R1 R2 C C1 C2 Is Zc Rz;

%% With feedforward capacitor
eq1=(Vo-V1)/Zc+gm*V1+Vo/R2+Vo*s*C2==0;
eq2=(V1-Vo)/Zc+V1*s*C1+V1/R1+Is==0;
eq1=subs(eq1,Zc,1/(s*C));
eq2=subs(eq2,Zc,1/(s*C));

disp('Solve for Vo and V1 and calculate Vo/Is with capacitor only in feedforward loop');
solved=solve(eq1,eq2,Vo,Is);
VoOnIs=solved.Vo/solved.Is;
pretty(simplify(VoOnIs));

%% With series resistor and capacitor in feedforward loop
eq1=(Vo-V1)/(Zc+Rz)+gm*V1+Vo/R2+Vo*s*C2==0;
eq2=(V1-Vo)/(Zc+Rz)+V1*s*C1+V1/R1+Is==0;
eq1=subs(eq1,Zc,1/(s*C));
eq2=subs(eq2,Zc,1/(s*C));

disp('Solve for Vo and V1 and calculate Vo/Is with resistor and capacitor in feedforward loop');
solved=solve(eq1,eq2,Vo,Is);
VoOnIs=solved.Vo/solved.Is;
pretty(simplify(VoOnIs));
```